Intel plans for Exa and Zettaflops supercomputers



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In his keynote address at ISC19, Raj Hazra, head of Intel's HPC department, again spoke of a paradigm shift needed for exascale and even later systems – the latter he expects. optimistically before 2030. By 2021, the Aurora supercomputer of the Argonne National Laboratory has announced some additional details.

First of all, Hazra confirmed that there are several compute accelerators in each cluster node with the X for 2020 announcedeGPU architecture. Aurora should also have more than 10 GB of main memory and more than 230 KB of storage with a data transfer rate greater than 25 TB / s. New storage techniques are needed to reduce the ratio of IT performance to "flop in bytes / sec" storage performance by 100,000: 1 to 10: 1. Distributed Object Aynchronous Object Storage is the magic word: DAOS – and this should not be a mess of empty marketing, but already a reality, because you can already download DAOS as open source code to from GitHub.

Aurora will work with many light cores. He should have a new "Unified Control System". The comprehensive power management system called Global Extensible Open Power Manager (GEOPM) is designed to optimize energy consumption by dynamically adapting to the needs of ongoing programs. execution – element used by TU Dresden for several sensors and measuring points of the system. Experienced years. And the launch of software with millions of processes on hundreds of thousands of processors should be done much faster with the "Process Management Interface Exascale" (PMIx).

With OpenMP 5.0 and Khronos SYCL, Intel development tools are also designed to support GPUs, AI accelerators, DSPs and FPGAs.

With OpenMP 5.0 and Khronos SYCL, Intel development tools are also designed to support GPUs, AI accelerators, DSPs and FPGAs.

(Image: Andreas Stiller)

In addition, Raj announced "One API". It is a set of advanced software tools, which Intel already offers with C / C ++ compilers, optimized libraries (maths), performance tuning, and so on. as a "composer". The novelty of One API is the support of different architectures: (x86-) CPU, (Xe-) GPU, AI accelerator of Movidius and Nervana, FPGA (Altera) …

On one side, KIRONOS has developed SYCL, a kind of OpenCL reborn on a higher level of abstraction. On the other hand, the new OpenMP 5.0 is added, which allows a greatly expanded unloading on "peripherals", such as Nvidia GPUs and probably also for AMD Radeon. In the routines of the target device, you can even call device-specific routines, such as CuBLAS.

Exascale, it was yesterday, Intel looks to the future ...

Exascale, it was yesterday, Intel looks to the future …

(Image: Andreas Stiller)

With these features of OpenMP 5.0, the OpenACC Swan sealed, which is supported only by Nvidia / PGI, since Cray has said goodbye. From here the end of the year, an API will be available.


(As)



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