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Intel's server roadmap and product families have been relatively quiet in recent years. The company reorganized its server chips into the Xeon Scalable family and moved away from the old E7 / E5 / E3 designations in 2017 and overhauled the Core X series, but has not made any dramatic changes to Xeon since AMD's launch of the Epyc family. . These changes are expected to take place in the first half of 2019, with the launch of Intel's latest high-end Xeon parts, Cascade Lake Advanced Performance. Unlike standard Cascade Lake chips, these chips will offer many more cores and support up to 2 socket systems.
Intel's current range of Xeon scalable processors, such as the Xeon Platinum 8180, are up to 28 CPUs
the kernels. The new Cascade Lake AP chips, meanwhile, will pack up to 48 cores using an MCM. Intel has yet to unveil the details of its interconnection, although it seems incredibly likely that it takes advantage of Intel's own EMIB (Embedded Multi-Die Interconnect Bridge). EMIB is already being used on Intel's Hades Canyon / Kaby Lake "G" and we believe it will be used here as well. Detailed information on how Intel will connect MCMs together or the number of cores in each chip – these are the kinds of details we do not have yet.
It is not surprising to see Intel make that decision. When AMD had 32-core processors In the marketplace, Intel's 28-core monolithic chips, with their higher CPIs, are not automatically at a disadvantage. But AMD is generally expected to grow up to 64 cores with the next-generation Epyc, and we've known for years that Intel would not continue to use monolithic chips forever.
Intel predicts 1.21 times better performance than Xeon Scalable 8180 (3.4 times better than AMD Epyc 7601), 1.83 times better than Stream Triad (1.3 times better than Epyc 7601), and 17 times higher in AI / Deep Learning inference compared to Xeon Platinum at launch. Since Cascade Lake has no release date other than 1H, it is reasonable to assume that, regardless of the type of Intel field, it will be confronted with AMD's Epyc 2 chip, named Rome, and built on 7 nm on TSMC. Even if 12 memory channels are bulky, it's not crazy – since the heart of the processor is progressively evolving, motherboards need more memory channels to maintain the balance.
Like Cascade Lake Standard, Cascade Lake AP will provide support for Intel Optane DIMMs with persistent memory and hardware fixes for issues such as Spectrum and Meltdown. In the absence of an official release date, we bet that these chips do not flip much before the summer – by which time they should have AMD's company.
Now read: Intel eliminates winning targets, refuses 10nm problems, Intel 9th generation processors are still hard to find at retailers and Intel Core i9-9900K Review: welcome to the 8-core Intel-AMD Slugfest
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